The invention relates to a system comprising at least one encoder for coding a digital signal and at least one decoder for decoding a coded digital signal, which encoder is provided with
an input for receiving the digital signal, PA1 first data processing means coupled with the input, for generating a first coded digital signal, PA1 reduction means coupled with the input, for reducing the received digital signal, PA1 second data processing means, coupled with the reduction means, for generating a second coded digital signal, and PA1 encoder prediction means for coupling the second data processing means with the first data processing means, PA1 data reprocessing means for processing a coded digital signal. PA1 first encoder memory means for feeding back at least part of the first data processing means, PA1 second encoder memory means for feeding back at least part of the second data processing means, PA1 decoder memory means coupled with the data reprocessing means. PA1 first encoder motion prediction means, which are in series with the first encoder memory means, for generating a first vector signal, PA1 second encoder motion prediction means, which are in series with the second encoder memory means, for generating a second vector signal, PA1 decoder motion compensation means for feeding back the decoder memory means and for receiving a vector signal. PA1 further data reprocessing means for processing a further coded digital signal, PA1 decoder prediction means coupled with the data reprocessing means and PA1 combining means coupled with the further data reprocessing means and with the decoder prediction means, for coupling the further data reprocessing means and the decoder prediction means with the decoder memory means. PA1 further reduction means coupled with the reduction means, for reducing further the received digital signal, PA1 third data processing means coupled with the further reduction means, for generating a third coded digital signal, PA1 third encoder memory means for feeding back at least part of the third data processing means, PA1 third encoder motion prediction means, which is in series with the third encoder memory means, for generating a third vector signal, PA1 further encoder prediction means for coupling the third data processing means with the second data processing means, a first side of the further encoder prediction means being coupled with the third encoder memory means, and a second side of the further encoder prediction means being coupled with both an input of the second encoder memory means and with an input of the second data processing means, PA1 subsequent data reprocessing means for processing a subsequent coded digital signal, PA1 subsequent decoder prediction means coupled with the subsequent data reprocessing means and PA1 subsequent combining means, which is situated between the data reprocessing means and the decoder prediction means, for coupling the data reprocessing means and the subsequent decoder prediction means with the decoder prediction means. PA1 an input for receiving the digital signal, PA1 first data processing means coupled with the input, for generating a first coded digital signal, PA1 reduction means coupled with the input, for reducing the received digital signal, PA1 second data processing means, coupled with the reduction means, for generating a second coded digital signal and, PA1 encoder prediction means for coupling the second data processing means with the first data processing means. PA1 first encoder memory means for feeding back at least part of the first data processing means, PA1 second encoder memory means for feeding back at least part of the second data processing means, PA1 first encoder motion prediction means, which is in series with the first encoder memory means, for generating a first vector signal, PA1 second encoder motion prediction means, which are in series with the second encoder memory means, for generating a second vector signal. PA1 further reduction means coupled with the reduction means, for reducing further the received digital signal, PA1 third data processing means coupled with the further reduction means, for generating a third coded digital signal, PA1 third encoder memory means for feeding back at least part of the third data processing means, PA1 third encoder motion prediction means, which is in series with the third encoder memory means, for generating a third vector signal, PA1 further encoder prediction means for coupling the third data processing means with the second data processing means, a first side of the further encoder prediction means being coupled with the third encoder memory means, and a second side of the further encoder prediction means being coupled with both an input of the second encoder memory means and with an input of the second data processing means. PA1 data reprocessing means for processing a coded digital signal. PA1 decoder memory means coupled with the data reprocessing means. PA1 decoder and motion compensation means for feeding back the decoder memory means for receiving a vector signal. PA1 further data reprocessing means for processing a further coded digital signal, PA1 decoder prediction means coupled with the data reprocessing means and PA1 combining means coupled with the further data reprocessing means and with the decoder prediction means, for coupling the further data reprocessing means and the decoder prediction means with the decoder memory means. PA1 subsequent data reprocessing means for processing a subsequent coded digital signal, PA1 subsequent decoder prediction means coupled with the subsequent data reprocessing means and PA1 subsequent combining means, which is situated between the data reprocessing means and the decoder prediction means, for coupling the data reprocessing means and the subsequent decoder prediction means with the decoder prediction means. PA1 EP 0 293 041 A1 PA1 "Description of reference model 8" (RM8) PA1 CCITT SGXV, working party XV/4, PA1 Specialists group on coding for visual telephony, document 525, 1989
and which decoder is provided with
A system of this type is disclosed by EP 0 293 041 A1, in particular by FIG. 6 (coding station) and FIG. 4 (decoding station) thereof. The television transmission system described therein comprises a coding station based on pyramidal coding (the encoder) and a decoding station based on pyramidal decoding (the decoder). The coding station is equipped with the input for receiving the digital signal to be coded, such as, for example, a television signal composed of picture elements (pixels or pels) and with the first data processing means, coupled with the input, for generating the first coded digital signal. The coding station is further equipped with the reduction means, coupled with the input, for reducing the digital signal received, with the second data processing means, coupled with the reduction means, for generating the second coded digital signal, and with the encoded prediction means for coupling the second data processing means with the first data processing means. Said first and second data processing means each comprise, for example, a series connection of a decimation circuit and a quantisation circuit. Such a system, provided with first and second data processing means, is, as it were, composed of two layers: the first data processing means generates the first coded digital signal, which has the highest resolution, because this signal is obtained by processing the received digital signal, and the second data processing means generates the second coded digital signal, which has the lowest resolution, because this signal is obtained by processing the received digital signal reduced by the reduction means. Both signals, via multiplexing and demultiplexing, are then transmitted to the decoding station which, in the case of decoding on the basis of high resolution, uses both signals and in the case of decoding on the basis of low resolution only uses the second coded digital signal. In its simplest form, the decoding station is equipped with the reprocessing means for processing the second coded digital signal, which comprises, for example, a series connection of an inverse quantisation circuit and an interpolation circuit. The simplicity of the decoding station, both in the case of decoding on the basis of high resolution and in the case of decoding on the basis of low resolution, is of considerable advantage in this system.
The known system has the drawback that it codes with insufficient efficiency.